@@ -2362,17 +2362,34 @@ int Matcher::max_vector_size(const BasicType bt) {
23622362}
23632363
23642364int Matcher::min_vector_size(const BasicType bt) {
2365- int max_size = max_vector_size(bt);
2366- // Limit the min vector size to 8 bytes.
2367- int size = 8 / type2aelembytes(bt);
2368- if (bt == T_BYTE) {
2369- // To support vector api shuffle/rearrange.
2370- size = 4;
2371- } else if (bt == T_BOOLEAN) {
2372- // To support vector api load/store mask.
2373- size = 2;
2365+ // Usually, the shortest vector length supported by AArch64 ISA and
2366+ // Vector API species is 64 bits. However, we allow 32-bit or 16-bit
2367+ // vectors in a few special cases.
2368+ int size;
2369+ switch(bt) {
2370+ case T_BOOLEAN:
2371+ // Load/store a vector mask with only 2 elements for vector types
2372+ // such as "2I/2F/2L/2D".
2373+ size = 2;
2374+ break;
2375+ case T_BYTE:
2376+ // Generate a "4B" vector, to support vector cast between "8B/16B"
2377+ // and "4S/4I/4L/4F/4D".
2378+ size = 4;
2379+ break;
2380+ case T_SHORT:
2381+ // Generate a "2S" vector, to support vector cast between "4S/8S"
2382+ // and "2I/2L/2F/2D".
2383+ size = 2;
2384+ break;
2385+ default:
2386+ // Limit the min vector length to 64-bit.
2387+ size = 8 / type2aelembytes(bt);
2388+ // The number of elements in a vector should be at least 2.
2389+ size = MAX2(size, 2);
23742390 }
2375- if (size < 2) size = 2;
2391+
2392+ int max_size = max_vector_size(bt);
23762393 return MIN2(size, max_size);
23772394}
23782395
@@ -3450,10 +3467,6 @@ encode %{
34503467 __ mov(dst_reg, (uint64_t)1);
34513468 %}
34523469
3453- enc_class aarch64_enc_mov_byte_map_base(iRegP dst, immByteMapBase src) %{
3454- __ load_byte_map_base($dst$$Register);
3455- %}
3456-
34573470 enc_class aarch64_enc_mov_n(iRegN dst, immN src) %{
34583471 Register dst_reg = as_Register($dst$$reg);
34593472 address con = (address)$src$$constant;
@@ -4554,20 +4567,6 @@ operand immP_1()
45544567 interface(CONST_INTER);
45554568%}
45564569
4557- // Card Table Byte Map Base
4558- operand immByteMapBase()
4559- %{
4560- // Get base of card map
4561- predicate(BarrierSet::barrier_set()->is_a(BarrierSet::CardTableBarrierSet) &&
4562- SHENANDOAHGC_ONLY(!BarrierSet::barrier_set()->is_a(BarrierSet::ShenandoahBarrierSet) &&)
4563- (CardTable::CardValue*)n->get_ptr() == ((CardTableBarrierSet*)(BarrierSet::barrier_set()))->card_table()->byte_map_base());
4564- match(ConP);
4565-
4566- op_cost(0);
4567- format %{ %}
4568- interface(CONST_INTER);
4569- %}
4570-
45714570// Float and Double operands
45724571// Double Immediate
45734572operand immD()
@@ -6854,20 +6853,6 @@ instruct loadConP1(iRegPNoSp dst, immP_1 con)
68546853 ins_pipe(ialu_imm);
68556854%}
68566855
6857- // Load Byte Map Base Constant
6858-
6859- instruct loadByteMapBase(iRegPNoSp dst, immByteMapBase con)
6860- %{
6861- match(Set dst con);
6862-
6863- ins_cost(INSN_COST);
6864- format %{ "adr $dst, $con\t# Byte Map Base" %}
6865-
6866- ins_encode(aarch64_enc_mov_byte_map_base(dst, con));
6867-
6868- ins_pipe(ialu_imm);
6869- %}
6870-
68716856// Load Narrow Pointer Constant
68726857
68736858instruct loadConN(iRegNNoSp dst, immN con)
0 commit comments