Remove cranelift_entity::{Signed, Unsigned} (#11400)

Use `*::cast_{un,}signed` in the Rust standard library stabilized in
1.87.

Author: alexcrichton

cranelift/codegen/src/ir/immediates.rs

@@ -10,7 +10,6 @@ use core::fmt::{self, Display, Formatter};
 use core::ops::{Add, BitAnd, BitOr, BitXor, Div, Mul, Neg, Not, Sub};
 use core::str::FromStr;
 use core::{i32, u32};
-use cranelift_entity::{Signed, Unsigned};
 #[cfg(feature = "enable-serde")]
 use serde_derive::{Deserialize, Serialize};
 
@@ -124,8 +123,8 @@ impl Imm64 {
 
         let bit_width = u64::from(bit_width);
         let delta = 64 - bit_width;
-        let zero_extended = (self.0.unsigned() << delta) >> delta;
-        Imm64(zero_extended.signed())
+        let zero_extended = (self.0.cast_unsigned() << delta) >> delta;
+        Imm64(zero_extended.cast_signed())
     }
 }
 

cranelift/codegen/src/isa/x64/inst/emit.rs

@@ -2075,7 +2075,7 @@ fn emit_maybe_shrink(inst: &AsmInst, sink: &mut impl asm::CodeSink) {
             m32,
             sink,
             |dst, amode, s| leal_rm::<R>::new(dst, amode).encode(s),
-            |dst, simm32, s| addl_mi::<R>::new(dst, simm32.unsigned()).encode(s),
+            |dst, simm32, s| addl_mi::<R>::new(dst, simm32.cast_unsigned()).encode(s),
             |dst, reg, s| addl_rm::<R>::new(dst, reg).encode(s),
         ),
         Inst::leaq_rm(leaq_rm { r64, m64 }) => emit_lea(

cranelift/codegen/src/isa/x64/inst/mod.rs

@@ -13,7 +13,6 @@ use crate::{machinst::*, trace};
 use alloc::boxed::Box;
 use core::slice;
 use cranelift_assembler_x64 as asm;
-use cranelift_entity::{Signed, Unsigned};
 use smallvec::{SmallVec, smallvec};
 use std::fmt::{self, Write};
 use std::string::{String, ToString};
@@ -166,7 +165,7 @@ impl Inst {
                 // If `simm64` is zero-extended use `movl` which zeros the
                 // upper bits.
                 Ok(imm32) => asm::inst::movl_oi::new(dst, imm32).into(),
-                _ => match i32::try_from(simm64.signed()) {
+                _ => match i32::try_from(simm64.cast_signed()) {
                     // If `simm64` is sign-extended use `movq` which sign the
                     // upper bits.
                     Ok(simm32) => asm::inst::movq_mi_sxl::new(dst, simm32).into(),
@@ -235,7 +234,7 @@ impl Inst {
     /// Compares `src1` against `src2`
     pub(crate) fn cmp_mi_sxb(size: OperandSize, src1: Gpr, src2: i8) -> Inst {
         let inst = match size {
-            OperandSize::Size8 => asm::inst::cmpb_mi::new(src1, src2.unsigned()).into(),
+            OperandSize::Size8 => asm::inst::cmpb_mi::new(src1, src2.cast_unsigned()).into(),
             OperandSize::Size16 => asm::inst::cmpw_mi_sxb::new(src1, src2).into(),
             OperandSize::Size32 => asm::inst::cmpl_mi_sxb::new(src1, src2).into(),
             OperandSize::Size64 => asm::inst::cmpq_mi_sxb::new(src1, src2).into(),

cranelift/codegen/src/isa/x64/lower/isle.rs

@@ -24,7 +24,6 @@ use crate::machinst::{
 };
 use alloc::vec::Vec;
 use cranelift_assembler_x64 as asm;
-use cranelift_entity::{Signed, Unsigned};
 use regalloc2::PReg;
 use std::boxed::Box;
 
@@ -173,7 +172,7 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
         if let Some(imm) = self.i64_from_iconst(val) {
             if let Ok(imm) = i32::try_from(imm) {
                 return RegMemImm::Imm {
-                    simm32: imm.unsigned(),
+                    simm32: imm.cast_unsigned(),
                 };
             }
         }
@@ -185,7 +184,7 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
         if let Some(imm) = self.i64_from_iconst(val) {
             if let Ok(imm) = i32::try_from(imm) {
                 return XmmMemImm::unwrap_new(RegMemImm::Imm {
-                    simm32: imm.unsigned(),
+                    simm32: imm.cast_unsigned(),
                 });
             }
         }
@@ -344,7 +343,7 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
     fn simm32_from_value(&mut self, val: Value) -> Option<GprMemImm> {
         let imm = self.i64_from_iconst(val)?;
         Some(GprMemImm::unwrap_new(RegMemImm::Imm {
-            simm32: i32::try_from(imm).ok()?.unsigned(),
+            simm32: i32::try_from(imm).ok()?.cast_unsigned(),
         }))
     }
 
@@ -975,35 +974,41 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
 
     fn is_imm8(&mut self, src: &GprMemImm) -> Option<u8> {
         match src.clone().to_reg_mem_imm() {
-            RegMemImm::Imm { simm32 } => Some(i8::try_from(simm32.signed()).ok()?.unsigned()),
+            RegMemImm::Imm { simm32 } => {
+                Some(i8::try_from(simm32.cast_signed()).ok()?.cast_unsigned())
+            }
             _ => None,
         }
     }
 
     fn is_imm8_xmm(&mut self, src: &XmmMemImm) -> Option<u8> {
         match src.clone().to_reg_mem_imm() {
-            RegMemImm::Imm { simm32 } => Some(i8::try_from(simm32.signed()).ok()?.unsigned()),
+            RegMemImm::Imm { simm32 } => {
+                Some(i8::try_from(simm32.cast_signed()).ok()?.cast_unsigned())
+            }
             _ => None,
         }
     }
 
     fn is_simm8(&mut self, src: &GprMemImm) -> Option<i8> {
         match src.clone().to_reg_mem_imm() {
-            RegMemImm::Imm { simm32 } => Some(i8::try_from(simm32.signed()).ok()?),
+            RegMemImm::Imm { simm32 } => Some(i8::try_from(simm32.cast_signed()).ok()?),
             _ => None,
         }
     }
 
     fn is_imm16(&mut self, src: &GprMemImm) -> Option<u16> {
         match src.clone().to_reg_mem_imm() {
-            RegMemImm::Imm { simm32 } => Some(i16::try_from(simm32.signed()).ok()?.unsigned()),
+            RegMemImm::Imm { simm32 } => {
+                Some(i16::try_from(simm32.cast_signed()).ok()?.cast_unsigned())
+            }
             _ => None,
         }
     }
 
     fn is_simm16(&mut self, src: &GprMemImm) -> Option<i16> {
         match src.clone().to_reg_mem_imm() {
-            RegMemImm::Imm { simm32 } => Some(i16::try_from(simm32.signed()).ok()?),
+            RegMemImm::Imm { simm32 } => Some(i16::try_from(simm32.cast_signed()).ok()?),
             _ => None,
         }
     }

cranelift/entity/src/lib.rs

@@ -277,9 +277,7 @@ mod list;
 mod map;
 mod primary;
 mod set;
-mod signed;
 mod sparse;
-mod unsigned;
 
 pub use self::boxed_slice::BoxedSlice;
 pub use self::iter::{Iter, IterMut};
@@ -288,9 +286,7 @@ pub use self::list::{EntityList, ListPool};
 pub use self::map::SecondaryMap;
 pub use self::primary::PrimaryMap;
 pub use self::set::{EntitySet, SetIter};
-pub use self::signed::Signed;
 pub use self::sparse::{SparseMap, SparseMapValue, SparseSet};
-pub use self::unsigned::Unsigned;
 
 /// A collection of tests to ensure that use of the different `entity_impl!` forms will generate
 /// `EntityRef` implementations that behave the same way.

cranelift/entity/src/signed.rs

@@ -31,7 +31,6 @@ use cranelift_codegen::{
     ir::{Expr, Fact},
 };
 use cranelift_frontend::FunctionBuilder;
-use wasmtime_environ::Unsigned;
 
 /// The kind of bounds check to perform when accessing a Wasm linear memory or
 /// GC heap.
@@ -961,7 +960,7 @@ fn statically_in_bounds(
                 _ => return None,
             };
             let ty = func.dfg.value_type(index);
-            let index = imm.zero_extend_from_width(ty.bits()).bits().unsigned();
+            let index = imm.zero_extend_from_width(ty.bits()).bits().cast_unsigned();
             let final_addr = index.checked_add(offset_and_size)?;
             Some(final_addr <= heap.memory.minimum_byte_size().unwrap_or(u64::MAX))
         })

cranelift/entity/src/unsigned.rs

@@ -24,7 +24,7 @@ use object::write::{Object, SectionId, StandardSegment, Symbol, SymbolId, Symbol
 use object::{Architecture, SectionFlags, SectionKind, SymbolFlags, SymbolKind, SymbolScope};
 use std::ops::Range;
 use wasmtime_environ::obj;
-use wasmtime_environ::{Compiler, TripleExt, Unsigned};
+use wasmtime_environ::{Compiler, TripleExt};
 
 const TEXT_SECTION_NAME: &[u8] = b".text";
 
@@ -546,7 +546,7 @@ impl<'a> UnwindInfoBuilder<'a> {
             // unwinders just use this constant for a relative addition with the
             // address of the FDE, which means that the sign doesn't actually
             // matter.
-            let fde = unwind_info.to_fde(Address::Constant(actual_offset.unsigned()));
+            let fde = unwind_info.to_fde(Address::Constant(actual_offset.cast_unsigned()));
             table.add_fde(cie_id, fde);
         }
         let endian = match compiler.triple().endianness().unwrap() {

crates/cranelift/src/bounds_checks.rs

@@ -93,8 +93,8 @@ use std::collections::{HashMap, hash_map};
 use std::vec::Vec;
 use wasmparser::{FuncValidator, MemArg, Operator, WasmModuleResources};
 use wasmtime_environ::{
-    DataIndex, ElemIndex, FuncIndex, GlobalIndex, MemoryIndex, Signed, TableIndex, TypeConvert,
-    TypeIndex, Unsigned, WasmRefType, WasmResult, WasmValType, wasm_unsupported,
+    DataIndex, ElemIndex, FuncIndex, GlobalIndex, MemoryIndex, TableIndex, TypeConvert, TypeIndex,
+    WasmRefType, WasmResult, WasmValType, wasm_unsupported,
 };
 
 /// Given a `Reachability<T>`, unwrap the inner `T` or, when unreachable, set
@@ -911,7 +911,7 @@ pub fn translate_operator(
         }
         /****************************** Nullary Operators ************************************/
         Operator::I32Const { value } => {
-            stack.push1(builder.ins().iconst(I32, i64::from(value.unsigned())));
+            stack.push1(builder.ins().iconst(I32, i64::from(value.cast_unsigned())));
         }
         Operator::I64Const { value } => stack.push1(builder.ins().iconst(I64, *value)),
         Operator::F32Const { value } => {
@@ -3301,7 +3301,7 @@ fn prepare_addr(
         Err(_) => {
             let offset = builder
                 .ins()
-                .iconst(heap.index_type(), memarg.offset.signed());
+                .iconst(heap.index_type(), memarg.offset.cast_signed());
             let adjusted_index = environ.uadd_overflow_trap(
                 builder,
                 index,
@@ -3370,7 +3370,7 @@ fn align_atomic_addr(
         let effective_addr = if memarg.offset == 0 {
             addr
         } else {
-            builder.ins().iadd_imm(addr, memarg.offset.signed())
+            builder.ins().iadd_imm(addr, memarg.offset.cast_signed())
         };
         debug_assert!(loaded_bytes.is_power_of_two());
         let misalignment = builder