Relevant changes from "rev 1.2" to "rev 1.4"

[vmayoral]

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(left side corresponds with rev. 1.2, right side rev. 1.4):

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In rev. 1.2 the VDD_ADC is not connected properly (that signal provides 1.8 V, the voltage divider is not needed).

OE from the voltage translators is connected to one of the pins in the P8 header and activated by one of the MIC (LDO) ICs.

Test points removed. Sensors need adjustments (rev. 1.4 sensors work fine).

Capacitor changed, signal added to POR2

Resistor changed from 10K to 100K.

Straight connection of the Power Module DF13-6 pins. Add CAP to the LDO. Add more resistors to the CURRENT and VOLTAGE sense lines.