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TejasgargTejasgarg
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SPI bus Low level driver
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4 files changed

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‎src/platform/h563xx/CMakeLists.txt‎

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@@ -3,6 +3,7 @@ target_sources(pslab-platform
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adc_ll.c
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led_ll.c
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platform.c
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spi_ll.c
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tim_ll.c
78
uart_ll.c
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usb_ll.c
@@ -32,6 +33,7 @@ target_link_libraries(pslab-platform
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HAL::STM32::H5::GPIO
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HAL::STM32::H5::RCCEx
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HAL::STM32::H5::PWREx
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HAL::STM32::H5::SPIEx
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HAL::STM32::H5::TIMEx
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HAL::STM32::H5::UARTEx
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tinyusb

‎src/platform/h563xx/spi_ll.c‎

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/**
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* @file spi_ll.c
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* @brief SPI hardware implementation for STM32H563xx
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*
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* This module handles initialization and operation of the SPI peripheral of
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* the STM32H5 microcontroller. It configures the hardware and dispatches SPI
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* interrupts to the hardware-independent SPI implementation.
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*
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* Implementation Details:
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* - Supports single SPI instance (SPI1)
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* - Configured for 8-bit data size
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* - DMA-based transmission and reception
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*
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* @author Tejas Garg
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* @date 2024-10-09
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*/
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#include "stm32h5xx_hal.h"
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#include "util/error.h"
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#include "spi_ll.h"
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enum { SPI_IRQ_PRIO = 4 }; // NVIC priority for SPI interrupts
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/* SPI instance structure */
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typedef struct {
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SPI_HandleTypeDef *hspi;
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bool initialized;
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bool tx_in_progress;
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bool rx_in_progress;
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void (*tx_complete_callback)(void);
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void (*rx_complete_callback)(void);
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} SPIInstance;
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/* HAL SPI handle */
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static SPI_HandleTypeDef g_hspi1 = { nullptr };
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static SPI_HandleTypeDef g_hspi2 = { nullptr };
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/* DMA handles */
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static DMA_HandleTypeDef g_hdma_spi1_tx = { nullptr };
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static DMA_HandleTypeDef g_hdma_spi1_rx = { nullptr };
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static DMA_HandleTypeDef g_hdma_spi2_tx = { nullptr };
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static DMA_HandleTypeDef g_hdma_spi2_rx = { nullptr };
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/* SPI instance configuration */
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static SPIInstance g_spi_instances[2] = {
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[SPI_BUS_0] = {
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.hspi = &g_hspi1,
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},
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[SPI_BUS_1] = {
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.hspi = &g_hspi2,
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},
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};
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void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
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{
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GPIO_InitTypeDef gpio_init = { 0 };
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if (hspi->Instance == SPI1) {
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/* SPI1 clock enable */
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__HAL_RCC_SPI1_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPDMA1_CLK_ENABLE();
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/* SPI1 GPIO Configuration: PA5=SCK, PA6=MISO, PA7=MOSI */
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gpio_init.Pin = GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
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gpio_init.Mode = GPIO_MODE_AF_PP;
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gpio_init.Pull = GPIO_NOPULL;
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gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
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gpio_init.Alternate = GPIO_AF5_SPI1;
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HAL_GPIO_Init(GPIOA, &gpio_init);
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/* Configure DMA for TX */
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g_hdma_spi1_tx.Instance = GPDMA1_Channel6;
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g_hdma_spi1_tx.Init.Request = GPDMA1_REQUEST_SPI1_TX;
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g_hdma_spi1_tx.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
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g_hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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g_hdma_spi1_tx.Init.SrcInc = DMA_SINC_INCREMENTED;
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g_hdma_spi1_tx.Init.DestInc = DMA_DINC_FIXED;
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g_hdma_spi1_tx.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
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g_hdma_spi1_tx.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
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g_hdma_spi1_tx.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
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g_hdma_spi1_tx.Init.SrcBurstLength = 1;
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g_hdma_spi1_tx.Init.DestBurstLength = 1;
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g_hdma_spi1_tx.Init.TransferAllocatedPort =
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(DMA_SRC_ALLOCATED_PORT0 | DMA_DEST_ALLOCATED_PORT0);
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g_hdma_spi1_tx.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
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g_hdma_spi1_tx.Init.Mode = DMA_NORMAL;
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HAL_DMA_Init(&g_hdma_spi1_tx);
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__HAL_LINKDMA(hspi, hdmatx, g_hdma_spi1_tx);
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/* Configure DMA for RX */
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g_hdma_spi1_rx.Instance = GPDMA1_Channel7;
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g_hdma_spi1_rx.Init.Request = GPDMA1_REQUEST_SPI1_RX;
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g_hdma_spi1_rx.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
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g_hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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g_hdma_spi1_rx.Init.SrcInc = DMA_SINC_FIXED;
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g_hdma_spi1_rx.Init.DestInc = DMA_DINC_INCREMENTED;
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g_hdma_spi1_rx.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
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g_hdma_spi1_rx.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
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g_hdma_spi1_rx.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
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g_hdma_spi1_rx.Init.SrcBurstLength = 1;
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g_hdma_spi1_rx.Init.DestBurstLength = 1;
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g_hdma_spi1_rx.Init.TransferAllocatedPort =
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(DMA_SRC_ALLOCATED_PORT0 | DMA_DEST_ALLOCATED_PORT0);
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g_hdma_spi1_rx.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
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g_hdma_spi1_rx.Init.Mode = DMA_NORMAL;
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HAL_DMA_Init(&g_hdma_spi1_rx);
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__HAL_LINKDMA(hspi, hdmarx, g_hdma_spi1_rx);
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/* SPI1 interrupt init */
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HAL_NVIC_SetPriority(SPI1_IRQn, SPI_IRQ_PRIO, 1);
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HAL_NVIC_EnableIRQ(SPI1_IRQn);
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/* DMA interrupt init */
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HAL_NVIC_SetPriority(GPDMA1_Channel6_IRQn, SPI_IRQ_PRIO, 1);
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HAL_NVIC_EnableIRQ(GPDMA1_Channel6_IRQn);
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HAL_NVIC_SetPriority(GPDMA1_Channel7_IRQn, SPI_IRQ_PRIO, 1);
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HAL_NVIC_EnableIRQ(GPDMA1_Channel7_IRQn);
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} else if (hspi->Instance == SPI2) {
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/* SPI2 GPIO Configuration: PB13=SCK, PB14=MISO, PB15=MOSI */
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gpio_init.Pin = GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
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gpio_init.Mode = GPIO_MODE_AF_PP;
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gpio_init.Pull = GPIO_NOPULL;
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gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
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gpio_init.Alternate = GPIO_AF5_SPI2;
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HAL_GPIO_Init(GPIOB, &gpio_init);
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/* Configure DMA for TX */
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g_hdma_spi2_tx.Instance = GPDMA1_Channel6;
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g_hdma_spi2_tx.Init.Request = GPDMA1_REQUEST_SPI2_TX;
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g_hdma_spi2_tx.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
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g_hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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g_hdma_spi2_tx.Init.SrcInc = DMA_SINC_INCREMENTED;
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g_hdma_spi2_tx.Init.DestInc = DMA_DINC_FIXED;
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g_hdma_spi2_tx.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
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g_hdma_spi2_tx.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
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g_hdma_spi2_tx.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
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g_hdma_spi2_tx.Init.SrcBurstLength = 1;
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g_hdma_spi2_tx.Init.DestBurstLength = 1;
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g_hdma_spi2_tx.Init.TransferAllocatedPort =
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(DMA_SRC_ALLOCATED_PORT0 | DMA_DEST_ALLOCATED_PORT0);
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g_hdma_spi2_tx.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
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g_hdma_spi2_tx.Init.Mode = DMA_NORMAL;
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HAL_DMA_Init(&g_hdma_spi2_tx);
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__HAL_LINKDMA(hspi, hdmatx, g_hdma_spi2_tx);
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/* Configure DMA for RX */
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g_hdma_spi2_rx.Instance = GPDMA1_Channel7;
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g_hdma_spi2_rx.Init.Request = GPDMA1_REQUEST_SPI2_RX;
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g_hdma_spi2_rx.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
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g_hdma_spi2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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g_hdma_spi2_rx.Init.SrcInc = DMA_SINC_FIXED;
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g_hdma_spi2_rx.Init.DestInc = DMA_DINC_INCREMENTED;
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g_hdma_spi2_rx.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
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g_hdma_spi2_rx.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
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g_hdma_spi2_rx.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
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g_hdma_spi2_rx.Init.SrcBurstLength = 1;
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g_hdma_spi2_rx.Init.DestBurstLength = 1;
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g_hdma_spi2_rx.Init.TransferAllocatedPort =
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(DMA_SRC_ALLOCATED_PORT0 | DMA_DEST_ALLOCATED_PORT0);
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g_hdma_spi2_rx.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
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g_hdma_spi2_rx.Init.Mode = DMA_NORMAL;
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HAL_DMA_Init(&g_hdma_spi2_rx);
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__HAL_LINKDMA(hspi, hdmarx, g_hdma_spi2_rx);
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/* SPI2 interrupt init */
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HAL_NVIC_SetPriority(SPI2_IRQn, SPI_IRQ_PRIO, 1);
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HAL_NVIC_EnableIRQ(SPI2_IRQn);
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/* DMA interrupt init */
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HAL_NVIC_SetPriority(GPDMA1_Channel6_IRQn, SPI_IRQ_PRIO, 1);
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HAL_NVIC_EnableIRQ(GPDMA1_Channel6_IRQn);
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HAL_NVIC_SetPriority(GPDMA1_Channel7_IRQn, SPI_IRQ_PRIO, 1);
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HAL_NVIC_EnableIRQ(GPDMA1_Channel7_IRQn);
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}
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}
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/**
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* @brief Initialize the SPI peripheral.
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*
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* @param bus SPI bus instance to initialize
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*/
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void SPI_LL_init(SPI_Bus bus)
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{
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if (bus >= SPI_BUS_COUNT) {
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THROW(ERROR_INVALID_ARGUMENT);
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}
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SPIInstance *instance = &g_spi_instances[bus];
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if (instance->initialized) {
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return;
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}
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SPI_TypeDef *spi_instance[SPI_BUS_COUNT] = {
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[SPI_BUS_0] = SPI1,
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[SPI_BUS_1] = SPI2,
199+
};
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/* Initialize SPI1 */
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instance->hspi->Instance = spi_instance[bus];
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instance->hspi->Init.Mode = SPI_MODE_MASTER;
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instance->hspi->Init.Direction = SPI_DIRECTION_2LINES;
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instance->hspi->Init.DataSize = SPI_DATASIZE_8BIT;
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instance->hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
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instance->hspi->Init.CLKPhase = SPI_PHASE_1EDGE;
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instance->hspi->Init.NSS = SPI_NSS_SOFT;
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instance->hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
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instance->hspi->Init.FirstBit = SPI_FIRSTBIT_MSB;
212+
instance->hspi->Init.TIMode = SPI_TIMODE_DISABLE;
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instance->hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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if (HAL_SPI_Init(instance->hspi) != HAL_OK) {
216+
THROW(ERROR_HARDWARE_FAULT);
217+
}
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/* Configure NVIC for SPI interrupts */
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HAL_NVIC_SetPriority(SPI1_IRQn, SPI_IRQ_PRIO, 0);
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HAL_NVIC_EnableIRQ(SPI1_IRQn);
222+
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instance->tx_in_progress = false;
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instance->rx_in_progress = false;
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instance->tx_complete_callback = nullptr;
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instance->rx_complete_callback = nullptr;
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instance->initialized = true;
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}
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/**
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* @brief Deinitialize the SPI peripheral.
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*
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* @param bus SPI bus instance to deinitialize
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*/
235+
void SPI_LL_deinit(SPI_Bus bus)
236+
{
237+
if (bus >= SPI_BUS_COUNT) {
238+
THROW(ERROR_INVALID_ARGUMENT);
239+
}
240+
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SPIInstance *instance = &g_spi_instances[bus];
242+
if (!instance->initialized) {
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return;
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}
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/* Disable interrupts */
247+
if (bus == SPI_BUS_0) {
248+
HAL_NVIC_DisableIRQ(SPI1_IRQn);
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} else if (bus == SPI_BUS_1) {
250+
HAL_NVIC_DisableIRQ(SPI2_IRQn);
251+
}
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/* Deinitialize SPI */
254+
if (HAL_SPI_DeInit(instance->hspi) != HAL_OK) {
255+
THROW(ERROR_HARDWARE_FAULT);
256+
}
257+
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instance->tx_in_progress = false;
259+
instance->rx_in_progress = false;
260+
instance->tx_complete_callback = nullptr;
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instance->rx_complete_callback = nullptr;
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instance->initialized = false;
263+
}
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/**
266+
* @brief Transmit data over SPI.
267+
*
268+
* @param bus SPI bus instance to use
269+
* @param data Pointer to the data buffer to transmit
270+
* @param size Size of the data buffer
271+
*/
272+
void SPI_LL_transmit(SPI_Bus bus, uint8_t const *data, size_t size)
273+
{
274+
if (bus >= SPI_BUS_COUNT) {
275+
THROW(ERROR_INVALID_ARGUMENT);
276+
}
277+
278+
SPIInstance *instance = &g_spi_instances[bus];
279+
if (!instance->initialized) {
280+
THROW(ERROR_INVALID_ARGUMENT);
281+
}
282+
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// Start the transmission
284+
HAL_SPI_Transmit(instance->hspi, (uint8_t *)data, size, HAL_MAX_DELAY);
285+
}
286+
/**
287+
* @brief Receive data over SPI.
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*
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* @param bus SPI bus instance to use
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* @param data Pointer to the buffer to store received data
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* @param size Size of the data buffer
292+
*/
293+
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void SPI_LL_receive(SPI_Bus bus, uint8_t *data, size_t size)
295+
{
296+
if (bus >= SPI_BUS_COUNT) {
297+
THROW(ERROR_INVALID_ARGUMENT);
298+
}
299+
300+
SPIInstance *instance = &g_spi_instances[bus];
301+
if (!instance->initialized) {
302+
THROW(ERROR_INVALID_ARGUMENT);
303+
}
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// Start the reception
306+
HAL_SPI_Receive(instance->hspi, data, size, HAL_MAX_DELAY);
307+
}

‎src/platform/h563xx/stm32h5xx_hal_conf.h‎

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Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ extern "C" {
8585
// #define HAL_SDRAM_MODULE_ENABLED
8686
// #define HAL_SMARTCARD_MODULE_ENABLED
8787
// #define HAL_SMBUS_MODULE_ENABLED
88-
// #define HAL_SPI_MODULE_ENABLED
88+
#define HAL_SPI_MODULE_ENABLED
8989
// #define HAL_SRAM_MODULE_ENABLED
9090
#define HAL_TIM_MODULE_ENABLED
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#define HAL_UART_MODULE_ENABLED

‎src/platform/spi_ll.h‎

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@@ -0,0 +1,35 @@
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/**
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* @file spi_ll.h
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* @brief SPI low-level hardware interface for STM32H563xx
4+
*/
5+
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#ifndef SPI_LL_H
7+
#define SPI_LL_H
8+
9+
#include "stm32h5xx_hal.h"
10+
11+
/**
12+
* @brief SPI bus instance enumeration
13+
*/
14+
typedef enum { SPI_BUS_0 = 0, SPI_BUS_1 = 1, SPI_BUS_COUNT = 2 } SPI_Bus;
15+
16+
/**
17+
* @brief Initialize the SPI peripheral.
18+
*/
19+
void spi_ll_init(void);
20+
21+
/**
22+
* @brief Transmit data over SPI.
23+
* @param data Pointer to the data buffer to transmit.
24+
* @param size Size of the data buffer.
25+
*/
26+
void spi_ll_transmit(uint8_t *data, uint16_t size);
27+
28+
/**
29+
* @brief Receive data over SPI.
30+
* @param data Pointer to the buffer to store received data.
31+
* @param size Size of the data buffer.
32+
*/
33+
void spi_ll_receive(uint8_t *data, uint16_t size);
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35+
#endif /* SPI_LL_H */

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