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perigosoperigoso
committed
remove duplicate link register bit macros
Signed-off-by: Rafael Silva <[email protected]>
1 parent 4ab3418 commit 8948cf5

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3 files changed

+143
-168
lines changed

3 files changed

+143
-168
lines changed

‎src/portable/renesas/link/dcd_link.c‎

Lines changed: 57 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -247,7 +247,7 @@ static uint8_t pipe0_xfer_in(void)
247247
}
248248
}
249249
if (len < mps)
250-
LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
250+
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
251251
pipe->remaining = rem - len;
252252
return 0;
253253
}
@@ -270,7 +270,7 @@ static uint8_t pipe0_xfer_out(void)
270270
}
271271
}
272272
if (len < mps)
273-
LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
273+
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
274274
pipe->remaining = rem - len;
275275
if ((len < mps) || (rem == len)) {
276276
pipe->buf = NULL;
@@ -289,7 +289,8 @@ static uint8_t pipe_xfer_in(unsigned num)
289289
return 1;
290290
}
291291

292-
LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
292+
LINK_REG->D0FIFOSEL =
293+
num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
293294
const unsigned mps = edpt_max_packet_size(num);
294295
pipe_wait_for_ready(num);
295296
const unsigned len = TU_MIN(rem, mps);
@@ -303,7 +304,7 @@ static uint8_t pipe_xfer_in(unsigned num)
303304
}
304305
}
305306
if (len < mps)
306-
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
307+
LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
307308
LINK_REG->D0FIFOSEL = 0;
308309
while (LINK_REG->D0FIFOSEL_bits.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
309310
pipe->remaining = rem - len;
@@ -315,7 +316,7 @@ static uint8_t pipe_xfer_out(unsigned num)
315316
pipe_state_t *pipe = &_dcd.pipe[num];
316317
const unsigned rem = pipe->remaining;
317318

318-
LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8;
319+
LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT;
319320
const unsigned mps = edpt_max_packet_size(num);
320321
pipe_wait_for_ready(num);
321322
const unsigned vld = LINK_REG->D0FIFOCTR_bits.DTLN;
@@ -330,7 +331,7 @@ static uint8_t pipe_xfer_out(unsigned num)
330331
}
331332
}
332333
if (len < mps)
333-
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR;
334+
LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
334335
LINK_REG->D0FIFOSEL = 0;
335336
while (LINK_REG->D0FIFOSEL_bits.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
336337
pipe->remaining = rem - len;
@@ -344,22 +345,22 @@ static uint8_t pipe_xfer_out(unsigned num)
344345
static void process_setup_packet(uint8_t rhport)
345346
{
346347
uint16_t setup_packet[4];
347-
if (0 == (LINK_REG->INTSTS0 & USB_IS0_VALID))
348+
if (0 == (LINK_REG->INTSTS0 & LINK_REG_INTSTS0_VALID_Msk))
348349
return;
349-
LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
350+
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
350351
setup_packet[0] = tu_le16toh(LINK_REG->USBREQ);
351352
setup_packet[1] = LINK_REG->USBVAL;
352353
setup_packet[2] = LINK_REG->USBINDX;
353354
setup_packet[3] = LINK_REG->USBLENG;
354-
LINK_REG->INTSTS0 = ~USB_IS0_VALID;
355+
LINK_REG->INTSTS0 = ~((uint16_t)LINK_REG_INTSTS0_VALID_Msk);
355356
dcd_event_setup_received(rhport, (const uint8_t *) &setup_packet[0], 1);
356357
}
357358

358359
static void process_status_completion(uint8_t rhport)
359360
{
360361
uint8_t ep_addr;
361362
/* Check the data stage direction */
362-
if (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) {
363+
if (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) {
363364
/* IN transfer. */
364365
ep_addr = tu_edpt_addr(0, TUSB_DIR_IN);
365366
} else {
@@ -373,12 +374,12 @@ static uint8_t process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void *buffer
373374
{
374375
/* configure fifo direction and access unit settings */
375376
if (ep_addr) { /* IN, 2 bytes */
376-
LINK_REG->CFIFOSEL =
377-
USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
378-
while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) continue;
377+
LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
378+
(TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
379+
while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) continue;
379380
} else { /* OUT, a byte */
380-
LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8;
381-
while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) continue;
381+
LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
382+
while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) continue;
382383
}
383384

384385
pipe_state_t *pipe = &_dcd.pipe[0];
@@ -391,11 +392,11 @@ static uint8_t process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void *buffer
391392
TU_ASSERT(LINK_REG->DCPCTR_bits.BSTS && (LINK_REG->USBREQ & 0x80));
392393
pipe0_xfer_in();
393394
}
394-
LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
395+
LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
395396
} else {
396397
/* ZLP */
397398
pipe->buf = NULL;
398-
LINK_REG->DCPCTR = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF;
399+
LINK_REG->DCPCTR = LINK_REG_DCPCTR_CCPL_Msk | LINK_REG_PIPE_CTR_PID_BUF;
399400
}
400401
return 1;
401402
}
@@ -419,7 +420,7 @@ static uint8_t process_pipe_xfer(int buffer_type, uint8_t ep_addr, void *buffer,
419420
} else { /* ZLP */
420421
LINK_REG->D0FIFOSEL = num;
421422
pipe_wait_for_ready(num);
422-
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
423+
LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
423424
LINK_REG->D0FIFOSEL = 0;
424425
while (LINK_REG->D0FIFOSEL_bits.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
425426
}
@@ -433,11 +434,11 @@ static uint8_t process_pipe_xfer(int buffer_type, uint8_t ep_addr, void *buffer,
433434
const unsigned mps = edpt_max_packet_size(num);
434435
volatile uint16_t *ctr = get_pipectr(num);
435436
if (*ctr & 0x3)
436-
*ctr = USB_PIPECTR_PID_NAK;
437+
*ctr = LINK_REG_PIPE_CTR_PID_NAK;
437438
pt->TRE = TU_BIT(8);
438439
pt->TRN = (total_bytes + mps - 1) / mps;
439440
pt->TRENB = 1;
440-
*ctr = USB_PIPECTR_PID_BUF;
441+
*ctr = LINK_REG_PIPE_CTR_PID_BUF;
441442
}
442443
}
443444
// TU_LOG1("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type);
@@ -488,7 +489,7 @@ static void process_bus_reset(uint8_t rhport)
488489
{
489490
LINK_REG->BEMPENB = 1;
490491
LINK_REG->BRDYENB = 1;
491-
LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
492+
LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
492493
LINK_REG->D0FIFOSEL = 0;
493494
while (LINK_REG->D0FIFOSEL_bits.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
494495
LINK_REG->D1FIFOSEL = 0;
@@ -498,7 +499,7 @@ static void process_bus_reset(uint8_t rhport)
498499
for (int i = 1; i <= 5; ++i) {
499500
LINK_REG->PIPESEL = i;
500501
LINK_REG->PIPECFG = 0;
501-
*ctr = USB_PIPECTR_ACLRM;
502+
*ctr = LINK_REG_PIPE_CTR_ACLRM_Msk;
502503
*ctr = 0;
503504
++ctr;
504505
*tre = TU_BIT(8);
@@ -507,7 +508,7 @@ static void process_bus_reset(uint8_t rhport)
507508
for (int i = 6; i <= 9; ++i) {
508509
LINK_REG->PIPESEL = i;
509510
LINK_REG->PIPECFG = 0;
510-
*ctr = USB_PIPECTR_ACLRM;
511+
*ctr = LINK_REG_PIPE_CTR_ACLRM_Msk;
511512
*ctr = 0;
512513
++ctr;
513514
}
@@ -555,8 +556,9 @@ void dcd_init(uint8_t rhport)
555556

556557
/* Setup default control pipe */
557558
LINK_REG->DCPMAXP_bits.MXPS = 64;
558-
LINK_REG->INTENB0 = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | USB_IS0_DVST | USB_IS0_CTRT |
559-
(USE_SOF ? USB_IS0_SOFR : 0) | USB_IS0_RESM;
559+
LINK_REG->INTENB0 = LINK_REG_INTSTS0_VBINT_Msk | LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk |
560+
LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_CTRT_Msk | (USE_SOF ? LINK_REG_INTSTS0_SOFR_Msk : 0) |
561+
LINK_REG_INTSTS0_RESM_Msk;
560562
LINK_REG->BEMPENB = 1;
561563
LINK_REG->BRDYENB = 1;
562564

@@ -628,21 +630,21 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc)
628630
LINK_REG->PIPESEL = num;
629631
LINK_REG->PIPEMAXP = mps;
630632
volatile uint16_t *ctr = get_pipectr(num);
631-
*ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
633+
*ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk;
632634
*ctr = 0;
633635
unsigned cfg = (dir << 4) | epn;
634636
if (xfer == TUSB_XFER_BULK) {
635-
cfg |= (USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB);
637+
cfg |= (LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk);
636638
} else if (xfer == TUSB_XFER_INTERRUPT) {
637-
cfg |= USB_PIPECFG_INT;
639+
cfg |= LINK_REG_PIPECFG_TYPE_ISO;
638640
} else {
639-
cfg |= (USB_PIPECFG_ISO | USB_PIPECFG_DBLB);
641+
cfg |= (LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk);
640642
}
641643
LINK_REG->PIPECFG = cfg;
642644
LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
643645
LINK_REG->BRDYENB |= TU_BIT(num);
644646
if (dir || (xfer != TUSB_XFER_BULK)) {
645-
*ctr = USB_PIPECTR_PID_BUF;
647+
*ctr = LINK_REG_PIPE_CTR_PID_BUF;
646648
}
647649
// TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP);
648650
dcd_int_enable(rhport);
@@ -706,8 +708,8 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
706708
return;
707709
dcd_int_disable(rhport);
708710
const uint32_t pid = *ctr & 0x3;
709-
*ctr = pid | USB_PIPECTR_PID_STALL;
710-
*ctr = USB_PIPECTR_PID_STALL;
711+
*ctr = pid | LINK_REG_PIPE_CTR_PID_STALL;
712+
*ctr = LINK_REG_PIPE_CTR_PID_STALL;
711713
dcd_int_enable(rhport);
712714
}
713715

@@ -717,15 +719,15 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
717719
if (!ctr)
718720
return;
719721
dcd_int_disable(rhport);
720-
*ctr = USB_PIPECTR_SQCLR;
722+
*ctr = LINK_REG_PIPE_CTR_SQCLR_Msk;
721723

722724
if (tu_edpt_dir(ep_addr)) { /* IN */
723-
*ctr = USB_PIPECTR_PID_BUF;
725+
*ctr = LINK_REG_PIPE_CTR_PID_BUF;
724726
} else {
725727
const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
726728
LINK_REG->PIPESEL = num;
727729
if (LINK_REG->PIPECFG_bits.TYPE != 1) {
728-
*ctr = USB_PIPECTR_PID_BUF;
730+
*ctr = LINK_REG_PIPE_CTR_PID_BUF;
729731
}
730732
}
731733
dcd_int_enable(rhport);
@@ -740,40 +742,42 @@ void dcd_int_handler(uint8_t rhport)
740742

741743
unsigned is0 = LINK_REG->INTSTS0;
742744
/* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
743-
LINK_REG->INTSTS0 =
744-
~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID;
745-
if (is0 & USB_IS0_VBINT) {
745+
LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_CTRT_Msk | LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_SOFR_Msk |
746+
LINK_REG_INTSTS0_RESM_Msk | LINK_REG_INTSTS0_VBINT_Msk) &
747+
is0) |
748+
LINK_REG_INTSTS0_VALID_Msk;
749+
if (is0 & LINK_REG_INTSTS0_VBINT_Msk) {
746750
if (LINK_REG->INTSTS0_bits.VBSTS) {
747751
dcd_connect(rhport);
748752
} else {
749753
dcd_disconnect(rhport);
750754
}
751755
}
752-
if (is0 & USB_IS0_RESM) {
756+
if (is0 & LINK_REG_INTSTS0_RESM_Msk) {
753757
dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, 1);
754758
#if (0 == USE_SOF)
755759
LINK_REG->INTENB0_bits.SOFE = 0;
756760
#endif
757761
}
758-
if ((is0 & USB_IS0_SOFR) && LINK_REG->INTENB0_bits.SOFE) {
762+
if ((is0 & LINK_REG_INTSTS0_SOFR_Msk) && LINK_REG->INTENB0_bits.SOFE) {
759763
// USBD will exit suspended mode when SOF event is received
760764
dcd_event_bus_signal(rhport, DCD_EVENT_SOF, 1);
761765
#if (0 == USE_SOF)
762766
LINK_REG->INTENB0_bits.SOFE = 0;
763767
#endif
764768
}
765-
if (is0 & USB_IS0_DVST) {
766-
switch (is0 & USB_IS0_DVSQ) {
767-
case USB_IS0_DVSQ_DEF:
769+
if (is0 & LINK_REG_INTSTS0_DVST_Msk) {
770+
switch (is0 & LINK_REG_INTSTS0_DVSQ_Msk) {
771+
case LINK_REG_INTSTS0_DVSQ_STATE_DEF:
768772
process_bus_reset(rhport);
769773
break;
770-
case USB_IS0_DVSQ_ADDR:
774+
case LINK_REG_INTSTS0_DVSQ_STATE_ADDR:
771775
process_set_address(rhport);
772776
break;
773-
case USB_IS0_DVSQ_SUSP0:
774-
case USB_IS0_DVSQ_SUSP1:
775-
case USB_IS0_DVSQ_SUSP2:
776-
case USB_IS0_DVSQ_SUSP3:
777+
case LINK_REG_INTSTS0_DVSQ_STATE_SUSP0:
778+
case LINK_REG_INTSTS0_DVSQ_STATE_SUSP1:
779+
case LINK_REG_INTSTS0_DVSQ_STATE_SUSP2:
780+
case LINK_REG_INTSTS0_DVSQ_STATE_SUSP3:
777781
dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, 1);
778782
#if (0 == USE_SOF)
779783
LINK_REG->INTENB0_bits.SOFE = 1;
@@ -782,23 +786,23 @@ void dcd_int_handler(uint8_t rhport)
782786
break;
783787
}
784788
}
785-
if (is0 & USB_IS0_CTRT) {
786-
if (is0 & USB_IS0_CTSQ_SETUP) {
789+
if (is0 & LINK_REG_INTSTS0_CTRT_Msk) {
790+
if (is0 & LINK_REG_INTSTS0_CTSQ_CTRL_RDATA) {
787791
/* A setup packet has been received. */
788792
process_setup_packet(rhport);
789-
} else if (0 == (is0 & USB_IS0_CTSQ_MSK)) {
793+
} else if (0 == (is0 & LINK_REG_INTSTS0_CTSQ_Msk)) {
790794
/* A ZLP has been sent/received. */
791795
process_status_completion(rhport);
792796
}
793797
}
794-
if (is0 & USB_IS0_BEMP) {
798+
if (is0 & LINK_REG_INTSTS0_BEMP_Msk) {
795799
const unsigned s = LINK_REG->BEMPSTS;
796800
LINK_REG->BEMPSTS = 0;
797801
if (s & 1) {
798802
process_pipe0_bemp(rhport);
799803
}
800804
}
801-
if (is0 & USB_IS0_BRDY) {
805+
if (is0 & LINK_REG_INTSTS0_BRDY_Msk) {
802806
const unsigned m = LINK_REG->BRDYENB;
803807
unsigned s = LINK_REG->BRDYSTS & m;
804808
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */

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