Skip to content

Commit e5ef8bc

Browse files
committed
add russian-woodpecker board initial support
Signed-off-by: Rafael Silva <[email protected]>
1 parent 6d49df6 commit e5ef8bc

File tree

3 files changed

+196
-20
lines changed

3 files changed

+196
-20
lines changed

hw/bsp/russian_woodpecker/board.mk

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
DEPS_SUBMODULES += hw/mcu/microchip
2+
3+
CFLAGS += \
4+
-mthumb \
5+
-mcpu=cortex-m3 \
6+
-mfloat-abi=soft \
7+
-nostdlib -nostartfiles \
8+
-D__ATSAM3U2C__ \
9+
-D__SAM3U2C__ \
10+
-DCFG_TUSB_MCU=OPT_MCU_SAM3U
11+
12+
# suppress following warnings from mcu driver
13+
# CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual
14+
15+
DEPS_SUBMODULES += hw/mcu/microchip
16+
DEPS_SUBMODULES += lib/CMSIS_5
17+
18+
MCU_DIR = hw/mcu/microchip/sam3u
19+
20+
# All source paths should be relative to the top level.
21+
LD_FILE = $(MCU_DIR)/gcc/gcc/sam3u2c_flash.ld
22+
LDFLAGS += -L"$(TOP)/$(MCU_DIR)/gcc/gcc/"
23+
24+
SRC_C += \
25+
src/portable/microchip/sam3u/dcd_samhs.c \
26+
$(MCU_DIR)/gcc/gcc/startup_sam3u.c \
27+
$(MCU_DIR)/gcc/system_sam3u.c
28+
29+
INC += \
30+
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
31+
$(TOP)/$(MCU_DIR)/include \
32+
$(TOP)/hw/bsp/$(BOARD)
33+
34+
# For freeRTOS port source
35+
FREERTOS_PORT = ARM_CM3
36+
37+
# For flash-jlink target
38+
JLINK_DEVICE = ATSAM3U2C
39+
40+
flash: flash-jlink
Lines changed: 138 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,138 @@
1+
/*
2+
* The MIT License (MIT)
3+
*
4+
* Copyright (c) 2019, hathach (tinyusb.org)
5+
*
6+
* Permission is hereby granted, free of charge, to any person obtaining a copy
7+
* of this software and associated documentation files (the "Software"), to deal
8+
* in the Software without restriction, including without limitation the rights
9+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10+
* copies of the Software, and to permit persons to whom the Software is
11+
* furnished to do so, subject to the following conditions:
12+
*
13+
* The above copyright notice and this permission notice shall be included in
14+
* all copies or substantial portions of the Software.
15+
*
16+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22+
* THE SOFTWARE.
23+
*
24+
*/
25+
26+
#include "../board.h"
27+
28+
#include "sam.h"
29+
30+
#include <stdint.h>
31+
#include <stdbool.h>
32+
33+
#define CONF_CPU_FREQUENCY 96000000
34+
35+
//--------------------------------------------------------------------+
36+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
37+
//--------------------------------------------------------------------+
38+
39+
//------------- IMPLEMENTATION -------------//
40+
void board_init(void)
41+
{
42+
init_mcu();
43+
44+
/* Disable Watchdog */
45+
WDT->WDT_MR |= WDT_MR_WDDIS;
46+
47+
// LED
48+
// _pmc_enable_periph_clock(ID_PIOC);
49+
// gpio_set_pin_level(LED_PIN, false);
50+
// gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
51+
// gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
52+
53+
// Button
54+
// _pmc_enable_periph_clock(ID_PIOA);
55+
// gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
56+
// gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
57+
// gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
58+
59+
// Uart via EDBG Com
60+
// _pmc_enable_periph_clock(ID_USART1);
61+
// gpio_set_pin_function(UART_RX_PIN, MUX_PA21A_USART1_RXD1);
62+
// gpio_set_pin_function(UART_TX_PIN, MUX_PB4D_USART1_TXD1);
63+
64+
// usart_async_init(&edbg_com, USART1, edbg_com_buffer, sizeof(edbg_com_buffer), _usart_get_usart_async());
65+
// usart_async_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
66+
// usart_async_register_callback(&edbg_com, USART_ASYNC_TXC_CB, tx_cb_EDBG_COM);
67+
// usart_async_enable(&edbg_com);
68+
69+
#if CFG_TUSB_OS == OPT_OS_NONE
70+
// 1ms tick timer (samd SystemCoreClock may not correct)
71+
SysTick_Config(CONF_CPU_FREQUENCY / 1000);
72+
#endif
73+
74+
// Enable USB clock
75+
// _pmc_enable_periph_clock(ID_UDPHS);
76+
}
77+
78+
//--------------------------------------------------------------------+
79+
// USB Interrupt Handler
80+
//--------------------------------------------------------------------+
81+
void USBHS_Handler(void)
82+
{
83+
tud_int_handler(0);
84+
}
85+
86+
//--------------------------------------------------------------------+
87+
// Board porting API
88+
//--------------------------------------------------------------------+
89+
90+
void board_led_write(bool state)
91+
{
92+
(void) state;
93+
// gpio_set_pin_level(LED_PIN, state);
94+
}
95+
96+
uint32_t board_button_read(void)
97+
{
98+
return 0;
99+
// return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
100+
}
101+
102+
int board_uart_read(uint8_t* buf, int len)
103+
{
104+
(void) buf; (void) len;
105+
return 0;
106+
}
107+
108+
int board_uart_write(void const * buf, int len)
109+
{
110+
(void) buf; (void) len;
111+
// while until previous transfer is complete
112+
// while(uart_busy) {}
113+
// uart_busy = true;
114+
115+
// io_write(&edbg_com.io, buf, len);
116+
return len;
117+
}
118+
119+
#if CFG_TUSB_OS == OPT_OS_NONE
120+
volatile uint32_t system_ticks = 0;
121+
122+
void SysTick_Handler(void)
123+
{
124+
system_ticks++;
125+
}
126+
127+
uint32_t board_millis(void)
128+
{
129+
return system_ticks;
130+
}
131+
#endif
132+
133+
// Required by __libc_init_array in startup code if we are compiling using
134+
// -nostdlib/-nostartfiles.
135+
void _init(void)
136+
{
137+
138+
}

src/portable/microchip/sam3u/dcd_samhs.c

Lines changed: 18 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -94,18 +94,18 @@ static const tusb_desc_endpoint_t ep0_desc =
9494
.wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE,
9595
};
9696

97-
TU_ATTR_ALWAYS_INLINE static inline void CleanInValidateCache(uint32_t *addr, int32_t size)
98-
{
99-
if (SCB->CCR & SCB_CCR_DC_Msk)
100-
{
101-
SCB_CleanInvalidateDCache_by_Addr(addr, size);
102-
}
103-
else
104-
{
105-
__DSB();
106-
__ISB();
107-
}
108-
}
97+
// TU_ATTR_ALWAYS_INLINE static inline void CleanInValidateCache(uint32_t *addr, int32_t size)
98+
// {
99+
// if (SCB->CCR & SCB_CCR_DC_Msk)
100+
// {
101+
// SCB_CleanInvalidateDCache_by_Addr(addr, size);
102+
// }
103+
// else
104+
// {
105+
// __DSB();
106+
// __ISB();
107+
// }
108+
// }
109109
//------------------------------------------------------------------
110110
// Device API
111111
//------------------------------------------------------------------
@@ -120,16 +120,14 @@ void dcd_init (uint8_t rhport)
120120
void dcd_int_enable (uint8_t rhport)
121121
{
122122
(void) rhport;
123-
// NVIC_EnableIRQ((IRQn_Type) UDPHS_IRQn);
124-
NVIC_EnableIRQ((IRQn_Type) ID_USBHS);
123+
NVIC_EnableIRQ((IRQn_Type) UDPHS_IRQn);
125124
}
126125

127126
// Disable device interrupt
128127
void dcd_int_disable (uint8_t rhport)
129128
{
130129
(void) rhport;
131-
// NVIC_DisableIRQ((IRQn_Type) UDPHS_IRQn);
132-
NVIC_DisableIRQ((IRQn_Type) ID_USBHS);
130+
NVIC_DisableIRQ((IRQn_Type) UDPHS_IRQn);
133131
}
134132

135133
// Receive Set Address request, mcu port must also include status IN response
@@ -597,7 +595,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
597595
{
598596
// Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the
599597
// address to 32-byte boundaries.
600-
CleanInValidateCache((uint32_t*) tu_align((uint32_t) buffer, 4), total_bytes + 31);
598+
// CleanInValidateCache((uint32_t*) tu_align((uint32_t) buffer, 4), total_bytes + 31);
601599
uint32_t udd_dma_ctrl = total_bytes << SAMHS_DEV_DMACONTROL_BUFF_LENGTH_Pos;
602600
if (dir == TUSB_DIR_OUT)
603601
{
@@ -676,20 +674,20 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
676674
}
677675

678676
// Clean invalidate cache of linear part
679-
CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_lin, 4), info.len_lin + 31);
677+
// CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_lin, 4), info.len_lin + 31);
680678

681679
SAMHS_REG->SAMHS_DEV_DMA[epnum - 1].SAMHS_DEV_DMAADDRESS = (uint32_t)info.ptr_lin;
682680
if (info.len_wrap)
683681
{
684682
// Clean invalidate cache of wrapped part
685-
CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_wrap, 4), info.len_wrap + 31);
683+
// CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_wrap, 4), info.len_wrap + 31);
686684

687685
dma_desc[epnum - 1].next_desc = 0;
688686
dma_desc[epnum - 1].buff_addr = (uint32_t)info.ptr_wrap;
689687
dma_desc[epnum - 1].chnl_ctrl =
690688
udd_dma_ctrl_wrap | (info.len_wrap << SAMHS_DEV_DMACONTROL_BUFF_LENGTH_Pos);
691689
// Clean cache of wrapped DMA descriptor
692-
CleanInValidateCache((uint32_t*)&dma_desc[epnum - 1], sizeof(dma_desc_t));
690+
// CleanInValidateCache((uint32_t*)&dma_desc[epnum - 1], sizeof(dma_desc_t));
693691

694692
udd_dma_ctrl_lin |= SAMHS_DEV_DMASTATUS_DESC_LDST;
695693
SAMHS_REG->SAMHS_DEV_DMA[epnum - 1].SAMHS_DEV_DMANXTDSC = (uint32_t)&dma_desc[epnum - 1];

0 commit comments

Comments
 (0)