[CIR][AArch64] Implement NEON builtin vcvtq_f64_v

Adds support for vcvtq_f64_v and vcvt_f64_v builtins which convert
integer vectors to double-precision floating-point vectors.

The implementation uses cir.cast with int_to_float kind, which
automatically selects signed or unsigned conversion based on the
source type.

Author: bcardosolopes

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

@@ -4273,8 +4273,12 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
     llvm_unreachable("NEON::BI__builtin_neon_vrndq_v NYI");
   }
   case NEON::BI__builtin_neon_vcvt_f64_v:
-  case NEON::BI__builtin_neon_vcvtq_f64_v:
-    llvm_unreachable("NEON::BI__builtin_neon_vcvtq_f64_v NYI");
+  case NEON::BI__builtin_neon_vcvtq_f64_v: {
+    Ops[0] = builder.createBitcast(Ops[0], ty);
+    ty = GetNeonType(
+        this, NeonTypeFlags(NeonTypeFlags::Float64, false, Type.isQuad()));
+    return builder.createCast(cir::CastKind::int_to_float, Ops[0], ty);
+  }
   case NEON::BI__builtin_neon_vcvt_f64_f32: {
     llvm_unreachable("NEON::BI__builtin_neon_vcvt_f64_f32 NYI");
   }

clang/test/CIR/CodeGen/AArch64/neon.c

@@ -19443,3 +19443,17 @@ int8x8_t test_vtbl1_s8(int8x8_t a, int8x8_t b) {
   // OGCG: {{%.*}} = shufflevector <8 x i8> {{%.*}}, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
   // OGCG: {{%.*}} = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> {{%.*}}, <8 x i8> {{%.*}})
 }
+
+// CHECK-LABEL: test_vcvtq_f64_s64
+float64x2_t test_vcvtq_f64_s64(int64x2_t a) {
+  return vcvtq_f64_s64(a);
+
+  // CIR-LABEL: vcvtq_f64_s64
+  // CIR: {{%.*}} = cir.cast int_to_float {{%.*}} : !cir.vector<!s64i x 2> -> !cir.vector<!cir.double x 2>
+
+  // LLVM-LABEL: @test_vcvtq_f64_s64
+  // LLVM: {{%.*}} = sitofp <2 x i64> {{%.*}} to <2 x double>
+
+  // OGCG-LABEL: @test_vcvtq_f64_s64
+  // OGCG: {{%.*}} = sitofp <2 x i64> {{%.*}} to <2 x double>
+}