[rvfi] Track expanded instruction in rvfi

SamuelRiedel · SamuelRiedel · commit 363649603bc8 · 2025-11-04T16:20:47.000Z
Tracking also the original instruction, not only the micro-op, allows
the DV to track whether and which instruction we are expanding
diff --git a/rtl/ibex_core.sv b/rtl/ibex_core.sv
@@ -159,6 +159,7 @@ module ibex_core import ibex_pkg::*; #(
   output logic [31:0]                  rvfi_ext_mhpmcountersh [10],
   output logic                         rvfi_ext_ic_scr_key_valid,
   output logic                         rvfi_ext_irq_valid,
+  output logic [15:0]                  rvfi_ext_expanded_insn,
   `endif
 
   // CPU Control Signals
@@ -186,6 +187,7 @@ module ibex_core import ibex_pkg::*; #(
   logic [15:0] instr_rdata_c_id;               // Compressed instruction sampled inside IF stage
   logic        instr_is_compressed_id;
   instr_exp_e  instr_gets_expanded_id;
+  logic [15:0] instr_expanded_id;
   logic        instr_perf_count_id;
   logic        instr_bp_taken_id;
   logic        instr_fetch_err;                // Bus error on instr fetch
@@ -474,6 +476,7 @@ module ibex_core import ibex_pkg::*; #(
     .instr_rdata_c_id_o      (instr_rdata_c_id),
     .instr_is_compressed_id_o(instr_is_compressed_id),
     .instr_gets_expanded_id_o(instr_gets_expanded_id),
+    .instr_expanded_id_o     (instr_expanded_id),
     .instr_bp_taken_o        (instr_bp_taken_id),
     .instr_fetch_err_o       (instr_fetch_err),
     .instr_fetch_err_plus2_o (instr_fetch_err_plus2),
@@ -1318,6 +1321,9 @@ module ibex_core import ibex_pkg::*; #(
   logic [31:0]     rvfi_ext_stage_mhpmcountersh    [RVFI_STAGES][10];
   logic            rvfi_ext_stage_ic_scr_key_valid [RVFI_STAGES];
   logic            rvfi_ext_stage_irq_valid        [RVFI_STAGES+1];
+  logic [15:0]     rvfi_ext_stage_expanded_insn    [RVFI_STAGES];
+
+  logic [15:0]     rvfi_expanded_insn;
 
 
   logic        rvfi_stage_valid_d   [RVFI_STAGES];
@@ -1379,6 +1385,7 @@ module ibex_core import ibex_pkg::*; #(
   assign rvfi_ext_mhpmcountersh    = rvfi_ext_stage_mhpmcountersh    [RVFI_STAGES-1];
   assign rvfi_ext_ic_scr_key_valid = rvfi_ext_stage_ic_scr_key_valid [RVFI_STAGES-1];
   assign rvfi_ext_irq_valid        = rvfi_ext_stage_irq_valid        [RVFI_STAGES];
+  assign rvfi_ext_expanded_insn    = rvfi_ext_stage_expanded_insn    [RVFI_STAGES-1];
 
   // When an instruction takes a trap the `rvfi_trap` signal will be set. Instructions that take
   // traps flush the pipeline so ordinarily wouldn't be seen to be retire. The RVFI tracking
@@ -1596,6 +1603,7 @@ module ibex_core import ibex_pkg::*; #(
         rvfi_ext_stage_debug_mode[i]       <= '0;
         rvfi_ext_stage_mcycle[i]           <= '0;
         rvfi_ext_stage_ic_scr_key_valid[i] <= '0;
+        rvfi_ext_stage_expanded_insn[i]    <= '0;
         // DSim does not properly support array assignment in for loop, so unroll
         rvfi_ext_stage_mhpmcounters[i][0]  <= '0;
         rvfi_ext_stage_mhpmcountersh[i][0] <= '0;
@@ -1647,6 +1655,7 @@ module ibex_core import ibex_pkg::*; #(
             rvfi_ext_stage_debug_mode[i]       <= debug_mode;
             rvfi_ext_stage_mcycle[i]           <= cs_registers_i.mcycle_counter_i.counter_val_o;
             rvfi_ext_stage_ic_scr_key_valid[i] <= cs_registers_i.cpuctrlsts_ic_scr_key_valid_q;
+            rvfi_ext_stage_expanded_insn[i]    <= rvfi_expanded_insn;
             // DSim does not properly support array assignment in for loop, so unroll
             rvfi_ext_stage_mhpmcounters[i][0]  <= cs_registers_i.mhpmcounter[3][31:0];
             rvfi_ext_stage_mhpmcountersh[i][0] <= cs_registers_i.mhpmcounter[3][63:32];
@@ -1716,6 +1725,7 @@ module ibex_core import ibex_pkg::*; #(
             rvfi_ext_stage_ic_scr_key_valid[i] <= rvfi_ext_stage_ic_scr_key_valid[i-1];
             rvfi_ext_stage_mhpmcounters[i]     <= rvfi_ext_stage_mhpmcounters[i-1];
             rvfi_ext_stage_mhpmcountersh[i]    <= rvfi_ext_stage_mhpmcountersh[i-1];
+            rvfi_ext_stage_expanded_insn[i]    <= rvfi_ext_stage_expanded_insn[i-1];
           end
 
           // Some of the rvfi_ext_* signals are used to provide an interrupt notification (signalled
@@ -1784,6 +1794,14 @@ module ibex_core import ibex_pkg::*; #(
     end
   end
 
+  always_comb begin
+    if (instr_gets_expanded_id == INSTR_NOT_EXPANDED) begin
+      rvfi_expanded_insn = '0;
+    end else begin
+      rvfi_expanded_insn = instr_expanded_id;
+    end
+  end
+
   // Source registers 1 and 2 are read in the first instruction cycle
   // Source register 3 is read in the second instruction cycle.
   always_comb begin
diff --git a/rtl/ibex_if_stage.sv b/rtl/ibex_if_stage.sv
@@ -71,7 +71,11 @@ module ibex_if_stage import ibex_pkg::*; #(
                                                                 // instr_is_compressed_id_o = 1'b1
   output logic                        instr_is_compressed_id_o, // compressed decoder thinks this
                                                                 // is a compressed instr
-  output instr_exp_e                  instr_gets_expanded_id_o,
+  output instr_exp_e                  instr_gets_expanded_id_o, // this instruction comes from one
+                                                                // that gets expanded by the
+                                                                // compressed decoder
+  output logic [15:0]                 instr_expanded_id_o,      // the instruction that is currently
+                                                                // getting expanded
   output logic                        instr_bp_taken_o,         // instruction was predicted to be
                                                                 // a taken branch
   output logic                        instr_fetch_err_o,        // bus error on fetch
@@ -514,6 +518,8 @@ module ibex_if_stage import ibex_pkg::*; #(
         instr_fetch_err_plus2_o  <= '0;
         instr_rdata_c_id_o       <= '0;
         instr_is_compressed_id_o <= '0;
+        instr_gets_expanded_id_o <= INSTR_NOT_EXPANDED;
+        instr_expanded_id_o      <= '0;
         illegal_c_insn_id_o      <= '0;
         pc_id_o                  <= '0;
       end else if (if_id_pipe_reg_we) begin
@@ -525,6 +531,7 @@ module ibex_if_stage import ibex_pkg::*; #(
         instr_rdata_c_id_o       <= if_instr_rdata[15:0];
         instr_is_compressed_id_o <= instr_is_compressed_out;
         instr_gets_expanded_id_o <= instr_gets_expanded_out;
+        instr_expanded_id_o      <= if_instr_rdata[15:0];
         illegal_c_insn_id_o      <= illegal_c_instr_out;
         pc_id_o                  <= pc_if_o;
       end
@@ -540,6 +547,7 @@ module ibex_if_stage import ibex_pkg::*; #(
         instr_rdata_c_id_o       <= if_instr_rdata[15:0];
         instr_is_compressed_id_o <= instr_is_compressed_out;
         instr_gets_expanded_id_o <= instr_gets_expanded_out;
+        instr_expanded_id_o      <= if_instr_rdata[15:0];
         illegal_c_insn_id_o      <= illegal_c_instr_out;
         pc_id_o                  <= pc_if_o;
       end
diff --git a/rtl/ibex_lockstep.sv b/rtl/ibex_lockstep.sv
@@ -481,6 +481,7 @@ module ibex_lockstep import ibex_pkg::*; #(
     .rvfi_ext_mhpmcountersh    (),
     .rvfi_ext_ic_scr_key_valid (),
     .rvfi_ext_irq_valid        (),
+    .rvfi_ext_expanded_insn    (),
 `endif
 
     .fetch_enable_i         (shadow_inputs_q[0].fetch_enable),
diff --git a/rtl/ibex_top.sv b/rtl/ibex_top.sv
@@ -144,6 +144,7 @@ module ibex_top import ibex_pkg::*; #(
   output logic [31:0]                  rvfi_ext_mhpmcountersh [10],
   output logic                         rvfi_ext_ic_scr_key_valid,
   output logic                         rvfi_ext_irq_valid,
+  output logic [15:0]                  rvfi_ext_expanded_insn,
 `endif
 
   // CPU Control Signals
@@ -426,6 +427,7 @@ module ibex_top import ibex_pkg::*; #(
     .rvfi_ext_mhpmcountersh,
     .rvfi_ext_ic_scr_key_valid,
     .rvfi_ext_irq_valid,
+    .rvfi_ext_expanded_insn,
 `endif
 
     .fetch_enable_i        (fetch_enable_buf),
diff --git a/rtl/ibex_top_tracing.sv b/rtl/ibex_top_tracing.sv
@@ -135,6 +135,7 @@ module ibex_top_tracing import ibex_pkg::*; #(
   logic [31:0] rvfi_ext_mhpmcountersh [10];
   logic        rvfi_ext_ic_scr_key_valid;
   logic        rvfi_ext_irq_valid;
+  logic [15:0] rvfi_ext_expanded_insn;
 
   logic [31:0] unused_perf_regs [10];
   logic [31:0] unused_perf_regsh [10];
@@ -150,6 +151,7 @@ module ibex_top_tracing import ibex_pkg::*; #(
   logic [63:0] unused_rvfi_ext_mcycle;
   logic        unused_rvfi_ext_ic_scr_key_valid;
   logic        unused_rvfi_ext_irq_valid;
+  logic [15:0] unused_rvfi_ext_expanded_insn;
 
   // Tracer doesn't use these signals, though other modules may probe down into tracer to observe
   // them.
@@ -165,6 +167,7 @@ module ibex_top_tracing import ibex_pkg::*; #(
   assign unused_perf_regsh = rvfi_ext_mhpmcountersh;
   assign unused_rvfi_ext_ic_scr_key_valid = rvfi_ext_ic_scr_key_valid;
   assign unused_rvfi_ext_irq_valid = rvfi_ext_irq_valid;
+  assign unused_rvfi_ext_expanded_insn = rvfi_ext_expanded_insn;
 
   ibex_top #(
     .PMPEnable        ( PMPEnable        ),
@@ -273,6 +276,7 @@ module ibex_top_tracing import ibex_pkg::*; #(
     .rvfi_ext_mhpmcountersh,
     .rvfi_ext_ic_scr_key_valid,
     .rvfi_ext_irq_valid,
+    .rvfi_ext_expanded_insn,
 
     .fetch_enable_i,
     .alert_minor_o,
