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Revert "[dv] Enable Zcb and Zcmp extension in compiler"
This reverts commit 69083c1.
1 parent d8ca5d0 commit 4837c35

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3 files changed

+1
-39
lines changed

3 files changed

+1
-39
lines changed

dv/uvm/core_ibex/riscv_dv_extension/testlist.yaml

Lines changed: 0 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -1157,36 +1157,3 @@
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rtl_test: core_ibex_base_test
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rtl_params:
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RV32B: ["ibex_pkg::RV32BFull", "ibex_pkg::RV32BOTEarlGrey", "ibex_pkg::RV32BBalanced"]
1160-
1161-
- test: riscv_zcb_balanced_test
1162-
desc: >
1163-
Random instruction test with zcb instructions in balanced configuration
1164-
iterations: 10
1165-
gen_test: riscv_rand_instr_test
1166-
gen_opts: >
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+enable_zcb_extension=1
1168-
rtl_test: core_ibex_base_test
1169-
1170-
- test: riscv_zcmp_balanced_test
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desc: >
1172-
Random instruction test with zcmp instructions in balanced configuration
1173-
iterations: 10
1174-
gen_test: riscv_rand_instr_test
1175-
gen_opts: >
1176-
+enable_zcb_extension=1
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+enable_zcmp_extension=1
1178-
rtl_test: core_ibex_base_test
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1180-
- test: riscv_zcmp_directed_test
1181-
desc: >
1182-
Random instruction test with zcmp instructions in balanced configuration
1183-
iterations: 10
1184-
gen_test: riscv_instr_base_test
1185-
gen_opts: >
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+enable_zcb_extension=1
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+enable_zcmp_extension=1
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+directed_instr_0=riscv_zcmp_chain_instr_stream,1
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+instr_cnt=100
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+num_of_sub_program=0
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+no_branch_jump=1
1192-
rtl_test: core_ibex_base_test

dv/uvm/core_ibex/scripts/ibex_cmd.py

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -114,9 +114,8 @@ def get_isas_for_config(cfg: Config) -> Tuple[str, str]:
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has_bitmanip = cfg.rv32b != 'ibex_pkg::RV32BNone'
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toolchain_isa = base_isa + ('b' if has_bitmanip else '')
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toolchain_isa = toolchain_isa + ('_zicsr_zifencei_zcb_zcmp')
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119-
return (toolchain_isa, '_'.join([base_isa] + ['Zicsr','Zifencei','Zcb','Zcmp'] + bitmanip_isa))
118+
return (toolchain_isa, '_'.join([base_isa] + bitmanip_isa))
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_TestEntry = Dict[str, object]

dv/uvm/core_ibex/tests/core_ibex_base_test.sv

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -70,10 +70,6 @@ class core_ibex_base_test extends uvm_test;
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isa = {"rv32", RV32E ? "e" : "i"};
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if (RV32M != RV32MNone) isa = {isa, "m"};
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isa = {isa, "c"};
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isa = {isa, "_Zicsr"};
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isa = {isa, "_Zifencei"};
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isa = {isa, "_Zcb"};
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isa = {isa, "_Zcmp"};
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case (RV32B)
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RV32BNone:
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;

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