@@ -918,7 +918,7 @@ Module TLB.
918918 - Reads [ttbr] at [time], checks it is 64-bit.
919919 - Computes root entry address for [va], reads memory.
920920 - If entry is a table, builds a root context with ASID from TTBR
921- and inserts it into the input VATLB instead of making a new one .
921+ and inserts it into the input VATLB.
922922 - Returns the new VATLB and the boolean value
923923 if the new VATLB is different from the input *)
924924 Definition va_fill_root (vatlb : VATLB.t) (ts : TState.t)
@@ -995,7 +995,7 @@ Module TLB.
995995 (** Make [tlb] containing entries for [va] at [lvl].
996996 - At root: call [va_fill_root].
997997 - At deeper levels: for each parent entry, call [va_fill_lvl].
998- - Returns [(tlb , is_changed)]. [is_changed] is true when there are new VATLB entries. *)
998+ - Returns [(new_tlb , is_changed)]. [is_changed] is true when there are new VATLB entries. *)
999999 Definition va_fill (tlb : t) (ts : TState.t)
10001000 (init : Memory.initial)
10011001 (mem : Memory.t)
@@ -1130,7 +1130,7 @@ Module TLB.
11301130 (** Get the unique TLB states up until the timestamp [time]
11311131 along with their views as a [list (TLB.t * nat)].
11321132 The list is sorted in descending order by timestamp. *)
1133- Definition unique_snapshots_until_timestamp (ts : TState.t)
1133+ Definition unique_snapshots_until (ts : TState.t)
11341134 (mem_init : Memory.initial)
11351135 (mem : Memory.t)
11361136 (time : nat)
@@ -1755,7 +1755,7 @@ Definition run_trans_start (trans_start : TranslationStartInfo)
17551755 trans_res ←
17561756 if decide (va_in_range va) then
17571757 ttbr ← mlift $ ttbr_of_regime va trans_start.(TranslationStartInfo_regime);
1758- snapshots ← mlift $ TLB.unique_snapshots_until_timestamp ts init mem vmax_t va ttbr;
1758+ snapshots ← mlift $ TLB.unique_snapshots_until ts init mem vmax_t va ttbr;
17591759 valid_entries ← mlift $ TLB.get_valid_entries_from_snapshots snapshots mem tid va asid;
17601760 invalid_entries ← mlift $
17611761 TLB.get_invalid_entries_from_snapshots snapshots ts init mem tid is_ets2 va asid ttbr;
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