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Add llvm.x86.vcvtps2ph.128
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src/intrinsics/llvm_x86.rs

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@@ -1313,6 +1313,35 @@ pub(super) fn codegen_x86_llvm_intrinsic_call<'tcx>(
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ret.write_cvalue_transmute(fx, res);
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}
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"llvm.x86.vcvtps2ph.128" => {
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// https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_cvtps_ph
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intrinsic_args!(fx, args => (a, _imm8); intrinsic);
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let a = a.load_scalar(fx);
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let imm8 =
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if let Some(imm8) = crate::constant::mir_operand_get_const_val(fx, &args[1].node) {
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imm8
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} else {
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fx.tcx
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.dcx()
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.span_fatal(span, "Index argument for `_mm_cvtps_ph` is not a constant");
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};
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let imm8 = imm8.to_u32();
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codegen_inline_asm_inner(
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fx,
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&[InlineAsmTemplatePiece::String(format!("vcvtps2ph xmm0, xmm0, {imm8}").into())],
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&[CInlineAsmOperand::InOut {
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reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::xmm0)),
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_late: true,
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in_value: a,
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out_place: Some(ret)
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}],
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InlineAsmOptions::NOSTACK | InlineAsmOptions::PURE | InlineAsmOptions::NOMEM,
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);
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}
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_ => {
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fx.tcx
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.dcx()

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