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Proposal: Add SparkFun MicroMod STM32 Processor (STM32F405) #176

@1914Jegx

Description

@1914Jegx

Title
Proposal: Add SparkFun MicroMod STM32 Processor (STM32F405)

Body
Hi TSCircuit team! I’d like to propose adding the SparkFun MicroMod STM32 Processor to the funboards catalog.

Why this board

  • Expands MicroMod coverage (M.2 “E-class” 22mm edge) and brings STM32F4 (Cortex-M4) into the catalog.
  • Reusable mapping: once the MicroMod edge connector + STM32F405 pins are modeled, other MicroMod processors benefit.
  • Complexity: moderate/advanced (MCU, HSE/LSE clocks, boot/reset gating, SPI flash, SDIO, USB, SWD). Seems like a mid-tier bounty candidate.

Duplication check

  • I checked the public boards list in tscircuit/sparkfun-boards/boards/ and did not find this board at time of filing.
  • Also glanced at the org project board (Sparkfun Boards) and didn’t see it in progress. Please correct me if I missed it.

Planned implementation (TSX; no XY tooling)

  • Schematic (TSX):
    • STM32F405RG (LQFP-64) with VDDx/VDDA/VSSA, VCAP1/2 decoupling, PH0/PH1 12MHz HSE, PC14/PC15 32.768kHz LSE.
    • SPI flash W25Qxx (WSON-8 6x5) on SPI1 (PA5/PA6/PA7) + PC4 CS#; HOLD#/WP# as per schematic.
    • MicroMod edge symbol with named pins: 3.3V, GNDs, USB_D±, USB_VIN, RTC_3V, 3.3V_EN, !RESET!, !BOOT!, SWDIO/SWCLK, SDIO, SPI, I2C, UART, BUS/GPIO.
    • Boot/reset: BOOT0 gating via P‑MOSFET (DMG2305UX‑7), RC on NRST, PB2 (BOOT1) strapped.
  • PCB (TSX):
    • 22mm MicroMod card outline with chamfer; custom edge pad footprint (pads 1–75) per MicroMod spec.
    • Place LQFP‑64, crystals (3225/3215), WSON‑8 flash, decoupling; indicative routing for visuals.
  • Artifacts: snapshots/renders via tsci snapshot.

Acceptance/questions

  • Can you confirm it’s green to proceed and eligible for a bounty? If so, please attach a bounty and assign.
  • Any preference for edge connector footprint naming or a canonical MicroMod footprint I should reuse?
  • Any constraints (e.g., minimum visual fidelity for the edge connector, keepout notches, silk expectations)?
  • Any components/modules to avoid for funboards? (I’ve avoided relying on XY import.)

Estimated effort

  • 1–2 days for faithful schematic + functional PCB visualization (including custom edge footprint) and snapshots.

Thanks! Happy to adapt to preferred structure or scope.

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