This repository contains my personal solutions to problems from HDLBits.
Note: This is a work in progress — not all solutions are completed yet.
If you:
- Have suggestions to improve any of the solutions
- See bugs or issues
- Want to share a cleaner or more efficient approach
Feel free to open an issue or submit a pull request. I'm happy to learn from others!
Solutions are organized same as appear on the HDLBits site. Each file contains Verilog code for a specific exercise.
These solutions are meant for learning and reference. If you're working through HDLBits yourself, try solving the problems on your own before looking here!
Thanks for stopping by! ⭐️