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3 changes: 2 additions & 1 deletion llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1683,7 +1683,8 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
!TypeSize::isKnownLE(DL.getTypeSizeInBits(Src),
SrcLT.second.getSizeInBits()) ||
!TypeSize::isKnownLE(DL.getTypeSizeInBits(Dst),
DstLT.second.getSizeInBits()))
DstLT.second.getSizeInBits()) ||
SrcLT.first > 1 || DstLT.first > 1)
return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);

// The split cost is handled by the base getCastInstrCost
Expand Down
10 changes: 10 additions & 0 deletions llvm/test/Analysis/CostModel/RISCV/cast.ll
Original file line number Diff line number Diff line change
Expand Up @@ -6239,3 +6239,13 @@ define void @legalization_crash() {
fptoui <192 x float> undef to <192 x i1>
ret void
}

; Test that types that need to be split go through BasicTTIImpl.
define void @BitInt_crash() {
; ZVE64X-LABEL: 'BitInt_crash'
; ZVE64X-NEXT: Cost Model: Found an estimated cost of 2043 for instruction: %1 = bitcast <16 x i64> poison to <512 x i2>
; ZVE64X-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
;
bitcast <16 x i64> poison to <512 x i2>
ret void
}