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    64 repositories

    • riscv-high-assurance-cryptography

      Public
      High Assurance Cryptography
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •2•3•23•0•Updated Dec 11, 2025Dec 11, 2025

    • riscv-cheri

      Public
      This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
      memory-safetycapabilitiescompartmentalization
      TeX
      •
      Creative Commons Attribution 4.0 International
      •42•91•29•3•Updated Dec 11, 2025Dec 11, 2025

    • riscv-profiles

      Public
      RISC-V Architecture Profiles
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •46•168•20•3•Updated Dec 11, 2025Dec 11, 2025

    • riscv-debug-spec

      Public
      Working Draft of the RISC-V Debug Specification Standard
      Python
      •
      Other
      •99•501•72•16•Updated Dec 11, 2025Dec 11, 2025

    • riscv-b

      Public
      "B" extension - that represents the collection of the Zba, Zbb, and Zbs extensions
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •5•10•0•1•Updated Dec 11, 2025Dec 11, 2025

    • docs-dev-guide

      Public
      Documentation developer guide
      TeX
      •
      Creative Commons Attribution 4.0 International
      •39•119•8•3•Updated Dec 11, 2025Dec 11, 2025

    • riscv-glossary

      Public
      Makefile
      •6•10•17•0•Updated Dec 11, 2025Dec 11, 2025

    • riscv-fast-interrupt

      Public
      Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •52•283•5•3•Updated Dec 11, 2025Dec 11, 2025

    • riscv-svvptc

      Public
      Obviating Memory-Management Instructions after Marking PTEs Valid (Svvptc)
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •5•5•0•1•Updated Dec 11, 2025Dec 11, 2025

    • riscv-smmtt

      Public
      This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant security use cases e.g. confidential-computing, trusted platform services, fault isolation and so on.
      access-controltrusted-computingtrusted-execution-environmentconfidential-computingsmmttsupervisor-domainsap-teesmsdidsmmptsmsdia
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •22•64•5•2•Updated Dec 11, 2025Dec 11, 2025

    • riscv-isa-manual

      Public
      RISC-V Instruction Set Manual
      TeX
      •
      Creative Commons Attribution 4.0 International
      •779•4.4k•43•21•Updated Dec 11, 2025Dec 11, 2025

    • riscv-performance-event-sampling

      Public
      Define 2 new extensions to, along with Zihpm and Sscofpmf, enable event and instruction sampling with precise attribution.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •3•4•3•2•Updated Dec 11, 2025Dec 11, 2025

    • self-hosted-trace

      Public
      RISC-V Self-hosted Trace Development Repositoty
      TeX
      •
      Creative Commons Attribution 4.0 International
      •779•2•3•1•Updated Dec 11, 2025Dec 11, 2025

    • riscv-spec-barrier

      Public
      RISC-V Speculation Barrier
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •1•1•0•1•Updated Dec 11, 2025Dec 11, 2025

    • riscv-cfi

      Public
      This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. and Unpriv. specifications at https://github.com/riscv/riscv-isa-manual
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •24•93•0•1•Updated Dec 11, 2025Dec 11, 2025

    • docs-resources

      Public
      Ruby
      •
      Creative Commons Attribution 4.0 International
      •24•45•0•1•Updated Dec 11, 2025Dec 11, 2025

    • sig-functional-safety-whitepaper

      Public
      GitHub repository for the Functional Safety SIG Whitepaper Development
      TeX
      •
      Creative Commons Attribution 4.0 International
      •8•6•1•1•Updated Dec 11, 2025Dec 11, 2025

    • riscv-performance-events

      Public
      RISC-V Performance Events Specification
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •7•10•11•3•Updated Dec 10, 2025Dec 10, 2025

    • riscv-opcodes

      Public
      RISC-V Opcodes
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •347•816•28•27•Updated Dec 10, 2025Dec 10, 2025

    • docs-spec-template

      Public template
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •26•35•1•3•Updated Dec 10, 2025Dec 10, 2025

    • meta-riscv

      Public
      OpenEmbedded/Yocto layer for RISC-V Architecture
      riscvyocto-layeryoctoopenembeddedrisc-vyocto-metaopenembedded-layer
      BitBake
      •
      Other
      •162•409•20•4•Updated Dec 10, 2025Dec 10, 2025

    • sail-riscv

      Public
      Sail RISC-V model
      Sail
      •
      Other
      •236•636•120•81•Updated Dec 10, 2025Dec 10, 2025

    • riscv-zabha

      Public
      The Zabha extension provides support for byte and halfword atomic memory operations.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •9•11•0•1•Updated Dec 10, 2025Dec 10, 2025

    • riscv-spmp

      Public
      The repo contains the SPMP architectural specification, which includes capabilities like access control of read/write/execute requests by an hart, address matching, encoding of permissions, exceptions for access violation, and support for virtualization.
      TeX
      •
      Creative Commons Attribution 4.0 International
      •14•21•1•0•Updated Dec 9, 2025Dec 9, 2025

    • integer-vector-absolute-difference

      Public
      RISC-V Integer Vector Absolute Difference
      TeX
      •
      Creative Commons Attribution 4.0 International
      •779•1•0•1•Updated Dec 8, 2025Dec 8, 2025

    • riscv-docs-base-container-image

      Public
      A base container image populated with the dependencies to build the RISC-V Documentation.
      Apache License 2.0
      •10•18•0•3•Updated Dec 8, 2025Dec 8, 2025

    • composable-custom-extensions

      Public
      This task group will propose ISA extension(s) and non-ISA hardware and software interop interfaces to enable routine reuse and composition of a subcategory of custom extensions called composable extensions.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •4•11•1•1•Updated Dec 5, 2025Dec 5, 2025

    • developer.riscv.org

      Public
      HTML
      •5•1•6•1•Updated Dec 4, 2025Dec 4, 2025

    • riscv-worlds

      Public
      RISC-V Worlds provides isolation in a hardware platform by constraining access to system physical addresses.
      TeX
      •
      Creative Commons Attribution 4.0 International
      •779•9•9•0•Updated Dec 4, 2025Dec 4, 2025

    • riscv-memory-protection-hypervisor

      Public
      RISC-V Memory Protection for Hypervisor
      TeX
      •
      Creative Commons Attribution 4.0 International
      •779•0•0•0•Updated Nov 14, 2025Nov 14, 2025