List view

<code>riscv-rt</code>: Assembly algorithm for RAM init incompatible with upcoming RVE extension (future proofing)

Status: Closed (completed).

#189 In rust-embedded/riscv;

· by hegza was closed on Dec 12, 2024

<code>riscv-rt</code>: Broken eh_frame relocations on QEMU

Status: Closed (completed).

#196 In rust-embedded/riscv;

· by dreiss was closed on Nov 8, 2024

<code>riscv</code>: align assembly functions with <code>cortex-m</code> crate

Status: Closed (completed).

#181 In rust-embedded/riscv;

· by romancardenas was closed on Dec 17, 2024

<code>riscv</code>: All the CSR write operations should be unsafe by default

Status: Closed (completed).

#209 In rust-embedded/riscv;

· by jsgf was closed on Feb 8, 2025

riscv: redefine CSR registers with new helper macros

Status: Closed (completed).

#229 In rust-embedded/riscv;

· by rmsyn was closed on Feb 14, 2025

<code>riscv-rt</code>: reconfigurable trap frame

Status: Closed (completed).

#239 In rust-embedded/riscv;

· by romancardenas was closed on Sep 9, 2025

riscv: use CSR macros for mcounteren

Status: Merged (completed).

rust-embedded/riscvnumber 234

#234 In rust-embedded/riscv;

· by rmsyn was closed on Nov 4, 2024

riscv: define marchid using CSR macros

Status: Merged (completed).

rust-embedded/riscvnumber 232

#232 In rust-embedded/riscv;

· by rmsyn was closed on Oct 23, 2024

riscv: define mcause using CSR macros

Status: Merged (completed).

rust-embedded/riscvnumber 233

#233 In rust-embedded/riscv;

· by rmsyn was closed on Oct 27, 2024

Fix linker file for RISCV-64 targets

Status: Merged (completed).

rust-embedded/riscvnumber 236

#236 In rust-embedded/riscv;

· by romancardenas was closed on Nov 8, 2024

riscv: define mip using CSR macros

Status: Merged (completed).

rust-embedded/riscvnumber 242

#242 In rust-embedded/riscv;

· by rmsyn was closed on Nov 27, 2024

riscv: define mimpid using CSR macros

Status: Merged (completed).

rust-embedded/riscvnumber 241

#241 In rust-embedded/riscv;

· by rmsyn was closed on Nov 8, 2024

riscv: define mideleg using CSR macros

Status: Merged (completed).

rust-embedded/riscvnumber 237

#237 In rust-embedded/riscv;

· by rmsyn was closed on Nov 1, 2024

riscv: define mie using CSR macros

Status: Merged (completed).

rust-embedded/riscvnumber 240

#240 In rust-embedded/riscv;

· by rmsyn was closed on Nov 7, 2024