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Allow 64-bit Mcause::from_bits on rv64 #334

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Merged
romancardenas merged 1 commit into from
Jul 25, 2025
Merged

Allow 64-bit Mcause::from_bits on rv64 #334

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1 change: 1 addition & 0 deletions riscv/CHANGELOG.md
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Use `cfg(any(target_arch = "riscv32", target_arch = "riscv64"))` instead of `cfg(riscv)`.
- `riscv::pac_enum(unsafe CoreInterrupt)` now locates the vector table at the `.trap.vector`
section instead of `.trap`.
- Allow all bits to be set in Mcause::from_bits on 64-bit targets.

### Removed

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2 changes: 1 addition & 1 deletion riscv/src/register/mcause.rs
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Expand Up @@ -5,7 +5,7 @@ pub use crate::interrupt::Trap;
read_only_csr! {
/// `mcause` register
Mcause: 0x342,
mask: 0xffff_ffff,
mask: usize::MAX,
}

#[cfg(target_arch = "riscv32")]
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