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riscv.yaml
386 workflow run results
386 workflow run results

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Merge pull request #334 from jsgf/fix-mcause-interrupt Build check (riscv) #752: Commit ca86c48 pushed by github-merge-queue bot
13m 12s master
master
13m 12s
Build check (riscv) Build check (riscv) #751: Merge group checks requested
8m 13s
8m 13s
Allow 64-bit Mcause::from_bits on rv64 Build check (riscv) #750: Pull request #334 synchronize by jsgf
7m 14s jsgf:fix-mcause-interrupt
jsgf:fix-mcause-interrupt
7m 14s
riscv: Use riscv_pac::CoreInterruptNumber in xip registers Build check (riscv) #749: Pull request #331 synchronize by romancardenas
10m 5s riscv-interrupts
riscv-interrupts
10m 5s
Allow 64-bit Mcause::from_bits on rv64 Build check (riscv) #748: Pull request #334 synchronize by jsgf
15m 26s jsgf:fix-mcause-interrupt
jsgf:fix-mcause-interrupt
15m 26s
Allow 64-bit Mcause::from_bits on rv64 Build check (riscv) #747: Pull request #334 opened by jsgf
12m 25s jsgf:fix-mcause-interrupt
jsgf:fix-mcause-interrupt
12m 25s
Merge pull request #332 from bjoernQ/support-chips-wo-mie-mip Build check (riscv) #746: Commit f81db37 pushed by github-merge-queue bot
10m 38s master
master
10m 38s
Build check (riscv) Build check (riscv) #745: Merge group checks requested
10m 24s
10m 24s
Support chips which don't support MIE/MIP CSRs Build check (riscv) #744: Pull request #332 synchronize by bjoernQ
7m 28s bjoernQ:support-chips-wo-mie-mip
bjoernQ:support-chips-wo-mie-mip
7m 28s
Support chips which don't support MIE/MIP CSRs Build check (riscv) #742: Pull request #332 opened by bjoernQ
55s bjoernQ:support-chips-wo-mie-mip
bjoernQ:support-chips-wo-mie-mip
55s
riscv: Use riscv_pac::CoreInterruptNumber in xip registers Build check (riscv) #741: Pull request #331 opened by romancardenas
8m 45s riscv-interrupts
riscv-interrupts
8m 45s
Merge pull request #330 from rust-embedded/riscv-interrupts Build check (riscv) #740: Commit c8c0bba pushed by github-merge-queue bot
13m 53s master
master
13m 53s
Build check (riscv) Build check (riscv) #739: Merge group checks requested
10m 5s
10m 5s
riscv: Use riscv_pac::CoreInterrupt in mie register Build check (riscv) #738: Pull request #330 synchronize by romancardenas
7m 37s riscv-interrupts
riscv-interrupts
7m 37s
riscv: Use riscv_pac::CoreInterrupt in mie register Build check (riscv) #737: Pull request #330 synchronize by romancardenas
8m 34s riscv-interrupts
riscv-interrupts
8m 34s
riscv: Use riscv_pac::CoreInterrupt in mie register Build check (riscv) #736: Pull request #330 synchronize by romancardenas
10m 29s riscv-interrupts
riscv-interrupts
10m 29s
riscv: Use riscv_pac::CoreInterrupt in mie register Build check (riscv) #735: Pull request #330 synchronize by romancardenas
5m 27s riscv-interrupts
riscv-interrupts
5m 27s
riscv: Use riscv_pac::CoreInterrupt in mie register Build check (riscv) #734: Pull request #330 opened by romancardenas
5m 17s riscv-interrupts
riscv-interrupts
5m 17s
Merge pull request #329 from rust-embedded/post-init Build check (riscv) #733: Commit 73635b8 pushed by github-merge-queue bot
7m 41s master
master
7m 41s
Build check (riscv) Build check (riscv) #732: Merge group checks requested
10m 57s
10m 57s
riscv-rt: Add uninit section Build check (riscv) #731: Pull request #329 opened by romancardenas
5m 49s post-init
post-init
5m 49s
Merge pull request #328 from rust-embedded/post-init Build check (riscv) #730: Commit 9468182 pushed by github-merge-queue bot
10m 31s master
master
10m 31s
Build check (riscv) Build check (riscv) #729: Merge group checks requested
8m 36s
8m 36s
riscv-rt: Add __post_init Rust function Build check (riscv) #728: Pull request #328 synchronize by romancardenas
5m 39s post-init
post-init
5m 39s
riscv-rt: Add __post_init Rust function Build check (riscv) #727: Pull request #328 opened by romancardenas
7m 29s post-init
post-init
7m 29s